VDD2_18V_SUPPORT=Val_0x0, DRV_TYPEC=Val_0x0, CLK_MUL=Val_0x0, DRV_TYPED=Val_0x0, SDR50_SUPPORT=Val_0x0, DRV_TYPEA=Val_0x0, ADMA3_SUPPORT=Val_0x0
Capabilities 2 Register (32 to 63)
| SDR50_SUPPORT | SDR50 Support (UHS-I Only). This bit indicates that SDR50 is supported. 0 (Val_0x0): SDR50 not supported 1 (Val_0x1): SDR50 supported |
| DRV_TYPEA | Driver Type A Support (UHS-I Only). This bit indicates support of Driver Type A for 1.8 V Signaling. 0 (Val_0x0): Driver Type A not supported 1 (Val_0x1): Driver Type A supported |
| DRV_TYPEC | Driver Type C Support (UHS-I Only). This bit indicates support of Driver Type C for 1.8 V Signaling. 0 (Val_0x0): Driver Type C not supported 1 (Val_0x1): Driver Type C supported |
| DRV_TYPED | Driver Type D Support (UHS-I Only). This bit indicates support of Driver Type D for 1.8 V Signaling. 0 (Val_0x0): Driver Type D not supported 1 (Val_0x1): Driver Type D supported |
| CLK_MUL | Clock Multiplier. These bits indicate the clock multiplier of the programmable clock generator. Setting these bits to 0x0 means that the Host Controller does not support a programmable clock generator. 0 (Val_0x0): Clock multiplier not supported 1 (Val_0x1): Clock multiplier M = 2 2 (Val_0x2): Clock multiplier M = 3 255 (Val_0xFF): Clock multiplier M = 256 |
| ADMA3_SUPPORT | ADMA3 Support. This bit indicates whether the Host Controller is capable of using ADMA3. 0 (Val_0x0): ADMA3 not supported 1 (Val_0x1): ADMA3 supported |
| VDD2_18V_SUPPORT | 1.8 V VDD2 Support. This bit indicates support of VDD2 for the Host System. 0 (Val_0x0): 1.8 V VDD2 not supported 1 (Val_0x1): 1.8 V VDD2 supported |